An effective compliant substrate for low-dislocation relaxed Si1−xGex growth

An effective compliant substrate for Si1−xGex growth is presented. A silicon-on-insulator substrate was implanted with B and O forming 20 wt % borosilicate glass within the SiO2. The addition of the borosilicate glass to the buried oxide acted to reduce the viscosity at the growth temperature of Si1−xGex , promoting the in situ elastic deformation of the thin Si (∼ 20 nm) layer on the insulator. The sharing of the misfit between the Si and the Si1−xGex layers was observed and quantified by double-axis X-ray diffraction. In addition, the material quality was assessed using cross-sectional transmission electron microscopy, photoluminescence and etch pit density measurements. No misfit dislocations were observed in the partially relaxed 150-nm Si0.75Ge0.25 sample as-grown on a 20% borosilicate glass substrate. The threading dislocation density was estimated at 2×104 cm−2 for 500-nm Si0.75Ge0.25 grown on the 20% borosilicate glass substrate. This method may be used to prepare compliant substrates for the growth of low-dislocation relaxed SiGe layers. PACS: 81.15.Hi; 61.72.Ff; 68.55.Ln High-mobility strained Si, Si1−xGex , and Ge have attracted considerable attention for their potential applications in highfrequency devices [1, 2]. This has stimulated considerable interest in the study of relaxed Si1−xGex buffer layers, which can be used as “virtual substrates” for the growth of highmobility structures and the integration of III–V devices on Si [3, 4]. However, the large lattice mismatch (∼ 4.17%) between Si and Ge usually results in a high density of dislocations in the SiGe buffer layer at high Ge content. Moreover, threading dislocations can propagate through the SiGe buffer layer into the active layers on top, degrading the electrical and optical performance of the devices [5, 6]. To date, several techniques have been used to grow relaxed SiGe layers having a low threading dislocation density, including graded composition growth [7], low-temperature buffer layers [8]. However, the buffer layers have to be relatively thick in order ∗Corresponding author. (E-mail: [email protected]) to achieve low dislocation densities for device applications. In some cases, these schemes offer inadequate improvement in the material quality required to realize significant dividends in device performance. Recently, it was found that compliant substrates could be used for lattice-mismatched epitaxy by accommodating part of the strain in the thin substrate and absorbing the threading dislocations. The idea was proposed by Lo [9] and was attempted experimentally by Powell et al. using silicon-oninsulator (SOI) substrates at relatively high annealing temperatures [10]. Thin Si-on-SiO2 has also been shown, at high temperature, to be a compliant substrate for SiGe and GaN growth by several groups [11–13]. In the case of SiGe, the SiO2 is expected to be rigid in the growth temperature range necessary for SiGe epitaxy (typically between 450 ◦C and 700 ◦C). The inability of the Si layer to deform at these substrate temperatures limits the use of the Si layer for sharing the misfit strain during epitaxy. As a result, the relaxed SiGe layers grown on these types of substrates exhibited a large number of dislocations [11]. Therefore, to achieve a better compliant substrate, it is necessary to promote the in situ accommodation of the misfit. This could be realized provided that, at growth temperatures, the SiO2 layer becomes soft and the Si layer deforms. Borosilicate glass (BSG) has been known to have a lower softening temperature than SiO2 [14]. In this work, we used borosilicate glass to decrease the softening temperature of SiO2 and anticipated that the Si layer on the glass could become strained during the growth to accommodate the misfit strain. For further epitaxy, the underlying thin Si layer may eventually be dislocated to accommodate the whole misfit. Substrates having different concentrations of BSG in the SiO2 layer of SOI wafers were fabricated. These substrates are called BSG substrates in this paper. 1 Experimental procedure The fabrication process for the BSG substrates was as follows: SOI wafers with a 60-nm Si layer and a 400-nm buried layer of SiO2 were implanted with boron and oxygen with an implant dosage and energy selected according to the stoi-